High-efficiency Class-F Power Amplifier with a New Design of Input Matching Network

Author: Mahya Parnianchi

Abstract: This paper presents a novel access to develop a class-F power amplifier with high power-added efficiency (PAE). The main goal of the proposed PA is to obtain high PAE. The proposed HCC consists a design of output matching circuit (OMN) and input matching combined with a symmetric low-pass filter (LPF) reported. To accomplish a high-efficiency performance, a low-voltage pHEMT in the circuit was executed to supply the required dc-supply voltage. It yielded nth harmonic suppression and high-power added efficiency (PAE). The simulation was carried out using harmonic balance analysis. The power amplifier proposed in this study was fabricated at fundamental frequency of 1 GHz with PAE of 80% and DE of 86% under 12.3dBm input power and very low drain voltage of 2 V. This class-F PA manufactured with such features can be utilized for power amplification in wireless transmitter communication systems.

Pages: 865-873

DOI: 10.46300/9106.2022.16.106

International Journal of Circuits, Systems and Signal Processing, E-ISSN: 1998-4464, Volume 16, 2022, Art. #106